Circuit board with buried conductive trace formed thereon and method for manufacturing the same

ABSTRACT

A circuit board with a buried conductive trace formed thereon according to the present invention is provided. A buried conductive trace layer is formed on the surface of a substrate and the pads and fingers of the conductive trace layer are heightened to facilitate the subsequent process of molding.

CROSS REFERENCE TO RELATED APPLICATION

This application claims the priority benefit of Taiwan PatentApplication Serial Number 097121703 filed Jun. 11, 2008, the fulldisclosure of which is incorporated herein by reference.

BACKGROUND OF THE INVENTION

1. Field of the Invention

The invention relates to a circuit board and the method formanufacturing the same and more particularly, to a circuit board with aburied conductive trace formed thereon and the method for manufacturingthe same.

2. Description of the Related Art

Recently, as electronic devices have become multifunctional, technologyfor package substrates has been rapidly developed so as to realizelightweight, thin short, small, and highly integrated fine circuitpatterns. In particular, such lightweight, thin, short, small, andhighly integrated fine circuit patterns are required for the Chip ScalePackage (CSP) product group. In order to form fine circuit patterns on asmall substrate, a press method is typically used to form a buriedconductive trace on the substrate.

Referring to FIGS. 1 a to 1 h, a conventional method for forming aburied conductive trace on a substrate is first to form a copper layer120 on a carrier 110. The copper layer 120 has protrusion structures122, 124 and the pattern of the protrusion structures 122, 124 iscorresponding to that of the conductive trace desired to be formed on asubstrate (see FIGS. 1 a and 1 b). Afterward, the carrier 110 is pressedto a soft substrate 130, such as a B-stage Bismaleimide Triazine (BT)substrate such that the protrusion structures 122, 124 of the copperlayer 120 are buried on a surface 132 of the substrate 130. A surface134 opposite to the surface 132 of the substrate 130 can be optionallypressed with another copper layer 140 having protrusion structures 142so as to form a conductive trace on the surface 134 (see FIG. 1 c). Thecarriers 110 are separated from the copper layers 120, 140 and thecopper layers 120, 140 are then thinned by etching so that the surfaces132, 134 of the substrate 130 are exposed and the structures 122, 124,142 still remain on and are flush with the surfaces 132, 134 of thesubstrate 130, respectively. The buried structures 122, 124, 142 willfinally form the conductive trace layers on the substrate 130 (see FIG.1 d).

Subsequently, through holes 150 are formed on the substrate 130 byetching or drilling and a copper layer 160 is formed on the surfaces132, 134 of the substrate 130 and on the inner walls of the throughholes 150 by electroless plating (see FIG. 1 e). A layer of dry film 170is then formed on the surfaces 132, 134 of the substrate 130 to act as aplating mask in such a manner that the conductive trace layers on thesubstrate 130, i.e. the buried structures 122, 124, 142 are covered withthe dry film 170 and the through holes 150 are exposed from the dry film170. Next, the inner walls of the through holes 150 are plated with acopper layer 180 (see FIG. 1 f). Afterward, the dry film 170 and thecopper layer 160 formed on the surfaces 132, 134 of the substrate 130 byelectroless plating are removed. Subsequently, a solder mask 190 isformed on the surfaces 132, 134 of the substrate 130 and exposes thestructures 122, 124 and 142. The exposed portions of the structures 122,124 and 142 are applied with a layer of organic solderabilitypreservative (OSP) (see FIG. 1 g). Next, the dry film 170 is formed onthe structures 122 and 142 again and the structure 124 is plated with anickel/gold layer 195 (see FIG. 1 h). Finally, the dry film 170 isremoved from the substrate 130.

The above structures 124 plated with the Ni/Au layer 195 are to be usedas fingers to electrically connect to external circuitry through bondingwires. The structures 122 and 142 are to be used as pads to electricallyconnect to external circuitry through solder balls. Since the fingerstructures 124 are required to be plated with the Ni/Au layer 195, allthe structures 124 are electrically connected together to facilitate theimplementation of plating. However, the electrical performance of thestructures 124 cannot be tested after being plated since they areelectrically connected together.

Moreover, the resulting pad structures 122 are flush with the surface132 of the substrate 130 and the solder mask 190 usually has anon-negligible thickness. Therefore, when the pad structures 122 areelectrically connected to a chip by solder balls, the solder balls willhave only a small portion of the thickness protruding from the soldermask 190 (not shown in the figure). As a result, this will lead to asmall die gap between the chip and substrate 130. When an underfillmaterial or molding compound is used to protect the chip in a subsequentpackage process, it is not easy to fill up the die gap with them. Thus,voids will be formed in the underfill material or molding compound inthe die gap.

Accordingly, there exists a need to provide a method for manufacturing acircuit board with a buried conductive trace formed thereon to solve theabove-mentioned problems.

SUMMARY OF THE INVENTION

It is an object of the present invention to provide a method formanufacturing a circuit board with a buried conductive trace formedthereon, wherein the pads are heightened.

In order to achieve the above object, the method for manufacturing acircuit board with a buried conductive trace formed thereon according tothe first embodiment of the present invention is first to form a copperlayer on a carrier. The second surface of the copper layer is attachedto the carrier. The first surface opposite to the second surface of thecopper has a plurality of protrusion structures protruding therefrom andthe pattern of the protrusion structures is corresponding to that of theconductive trace desired to be formed on a substrate. Afterward, thecarrier is pressed to a B-stage BT substrate so that the protrusionstructures of the copper layer are buried on a surface of the substrate.Another surface of the substrate can be optionally pressed with anothercopper layer having protrusion structures. The carrier is separated fromthe copper layer so that the second surface of the copper layer isexposed. A layer of dry film is then formed on the copper layer to actas a plating mask and has openings to expose the first and second areason the second surface of the copper layer.

Afterward, the substrate is plated to form a nickel/gold layer on theexposed first and second areas. Subsequently, the dry film is removedand the copper layer is etched so that the surfaces of the substrate areexposed and the protrusion structures of the copper layer still remainon and are flush with the surfaces of the substrate. Since thenickel/gold layer acts as an etch mask and can protect the portion ofthe copper layer thereunder from being etched, a plurality of protrusionstructures is therefore formed on the surfaces of the substrate.Finally, plated through holes are formed on the substrate and a soldermask is formed on the surface of the substrate and exposes thenickel/gold layer.

The method for manufacturing a circuit board with a buried conductivetrace formed thereon according to the second embodiment of the presentinvention is substantially the same as the method according to the firstembodiment of the present invention. However, there are still somedifferences between them. According to the method of the secondembodiment of the present invention, the first and second areas on thesecond surface of the copper layer are not required to be plated withthe nickel/gold layer to act as an etch mask. Instead, a dry film isformed on only the first and second areas. The copper layer is thenetched so that the surfaces of the substrate are exposed and theprotrusion structures of the copper layer still remain on and are flushwith the surfaces of the substrate. Since the dry film acts as an etchmask and can protect the portion of the copper layer thereunder frombeing etched, a plurality of protrusion structures is therefore formedon the surfaces of the substrate. Afterward, the dry film is removed andplated through holes are formed on the substrate. Subsequently, a soldermask is formed on the surfaces of the substrate and exposes the firstand second areas. A layer of organic solderability preservative is thenapplied to the exposed first and second areas.

It is another object of the present invention to provide a circuit boardmanufactured by the above method.

According to the method of the present invention for manufacturing acircuit board with a buried conductive trace formed thereon, thestructures buried on the surfaces of the substrate are to form theconductive traces on the substrate. The copper layer located on thefirst and second areas is to be used as pads and fingers, respectively,to electrically connect to external circuitry, such as a chip. Since thefirst areas to be used as pads protrude from the substrate, solder ballswill protrude more from the solder mask when a chip is electricallyconnected to the first areas through the solder balls. This willincrease the die gap between the chip and the substrate. Consequently,it is easier for the underfill material or molding compound to flow toand fill up the die gap in the package process. Thus, voids will not beformed in the underfill material or molding compound in the die gap.Moreover, since the second areas to be used as fingers are not requiredto be electrically connected together, the electrical performancethereof can be tested immediately after the circuit board ismanufactured.

The foregoing, as well as additional objects, features and advantages ofthe invention will be more readily apparent from the following detaileddescription, which proceeds with reference to the accompanying drawings.

BRIEF DESCRIPTION OF THE DRAWINGS

FIGS. 1 a to 1 h illustrate a conventional method for manufacturing acircuit board with a buried conductive trace formed thereon.

FIGS. 2 a to 2 g illustrate the method for manufacturing a circuit boardwith a buried conductive trace formed thereon according to the firstembodiment of the present invention.

FIGS. 3 a to 3 b illustrate the method for manufacturing a circuit boardwith a buried conductive trace formed thereon according to the secondembodiment of the present invention.

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENT

Referring to FIGS. 2 a to 2 g, the method for manufacturing a circuitboard with a buried conductive trace formed thereon according to thefirst embodiment of the present invention is first to form a metal layer220, such as a copper layer on a carrier 210. The copper layer 220 has afirst surface 221 and a second surface 223 opposite to the first surface221. The second surface 223 of the copper layer 220 is attached to thecarrier 210. The first surface 221 of the copper layer 220 has aplurality of protrusion structures 222 and 224 protruding therefrom andthe pattern of the protrusion structures 222, 224 is corresponding tothat of the conductive trace desired to be formed on a substrate (seeFIGS. 2 a and 2 b). Afterward, the carrier 210 is pressed to a softsubstrate 230, such as a B-stage Bismaleimide Triazine substrate so thatthe protrusion structures 222, 224 of the copper layer 220 are buried ona surface 232 of the substrate 230. A surface 234 opposite to thesurface 232 of the substrate 230 can be optionally pressed with anothermetal layer 240, such as a copper layer having protrusion structures 242so as to form a conductive trace on the surface 234 (see FIG. 2 c). Thecarriers 210 are separated from the copper layers 220, 240 so that thecopper layer 240 and the second surface 223 of the copper layer 220 areexposed. A layer of dry film 270 is then formed on the copper layer 240and the second surface 223 of the copper layer 220 to act as a platingmask and has openings 272 to expose the areas 226 on the second surface223 of the copper layer 220 and the areas 246 on the copper layer 240(see FIG. 2 d).

Afterward, the substrate 230 is plated to form a metal layer 280, suchas a nickel/gold (Ni/Au) layer on the exposed areas 226 and 246 (seeFIG. 2 e). Subsequently, the dry film 270 is removed and the copperlayers 220, 240 are etched so that the surfaces 232, 234 of thesubstrate 230 are exposed and the structures 222, 224, 242 still remainon and are flush with the surfaces 232, 234 of the substrate 230,respectively. Since the Ni/Au layer 280 acts as an etch mask and canprotect the portions of the copper layers 220 and 240 thereunder frombeing etched, a plurality of protrusion structures is therefore formedon the surfaces 232, 234 of the substrate 230 (see FIG. 2 f). Finally,plated through holes 250 are formed on the substrate 230 by etching ordrilling and a solder mask 290 is formed on the surfaces 232, 234 of thesubstrate 230 and exposes the Ni/Au layer 280 (see FIG. 2 g).

Referring to FIGS. 3 a to 3 b, the method for manufacturing a circuitboard with a buried conductive trace formed thereon according to thesecond embodiment of the present invention is substantially the same asthe method according to the first embodiment of the present invention.However, there are still some differences between them. According to themethod of the second embodiment of the present invention, the areas 226on the second surface 223 of the copper layer 220 and the areas 246 onthe copper layer 240 are not required to be plated with the Ni/Au layer280 to act as an etch mask. Instead, a dry film 270 is formed on onlythe areas 226 and 246. The copper layers 220 and 240 are then etched sothat the surfaces 232, 234 of the substrate 230 are exposed and thestructures 222, 224, 242 still remain on and are flush with the surfaces232, 234 of the substrate 230, respectively. Since the dry film 270 actsas an etch mask and can protect the portions of the copper layers 220and 240 thereunder from being etched, a plurality of protrusionstructures is therefore formed on the surfaces 232, 234 of the substrate230 (see FIG. 3 a). Afterward, the dry film 270 is removed and platedthrough holes 250 are formed on the substrate 230. Subsequently, asolder mask 290 is formed on the surfaces 232, 234 of the substrate 230and exposes the areas 226, 246 (see FIG. 3 b). A layer of organicsolderability preservative is then applied to the exposed areas 226, 246(not shown in the figure).

Referring back to FIG. 2 g, the circuit board of the present inventionincludes the substrate 230, which has two opposing surfaces 232, 234 andthe through holes 250 plated with a copper layer. The conductive tracelayer 222 is buried on the substrate 230 and exposed from the surface232. The conductive trace layer 242 is buried on the substrate 230 andexposed from the surface 234. The conductive trace layer 222 has theareas 226 protruding from the surface 232 of the substrate 230 and theconductive trace layer 242 has the areas 246 protruding from the surface234 of the substrate 230. The Ni/Au layer 280 is formed on the areas 226to be used as pads or fingers to electrically connect to externalcircuitry through solder balls or bonding wires. In addition, the Ni/Aulayer 280 is also formed on the areas 246 to be used to electricallyconnect to another circuit board.

According to the method of the present invention for manufacturing acircuit board with a buried conductive trace formed thereon, thestructures 222, 224, 242 buried on the surfaces 232, 234 of thesubstrate 230 are to form the conductive traces on the substrate 230.The copper layer 220 located on the areas 226 and the copper layer 240located on the areas 246 are adapted to electrically connect to externalcircuitry, wherein the areas 226 on the structures 222 are to be used aspads to electrically connect to such as a chip through solder balls, theareas 226 on the structures 224 are to be used as fingers toelectrically connect to such as a chip through bonding wires and theareas 246 on the structures 242 are to be used as pads to electricallyconnect to such as another circuit board through solder balls (not shownin the figure). Since the areas 226 as pads protrude from the substrate230, solder balls will protrude more from the solder mask 290 ascompared with the above conventional circuit board when a chip iselectrically connected to the areas 226 through the solder balls (notshown in the figure). This will increase the die gap between the chipand the substrate 230. Consequently, it is easier for the underfillmaterial or molding compound to flow to and fill up the die gap in thepackage process. Thus, voids will not be formed in the underfillmaterial or molding compound in the die gap. Moreover, since the areas226 on the structures 224 to be used as fingers are not required to beelectrically connected together, the electrical performance thereof canbe tested immediately after the circuit board is manufactured.

Although the preferred embodiments of the invention have been disclosedfor illustrative purposes, those skilled in the art will appreciate thatvarious modifications, additions and substitutions are possible, withoutdeparting from the scope and spirit of the invention as disclosed in theaccompanying claims.

What is claimed is:
 1. A method for manufacturing a circuit board,comprising the steps of: providing a substrate with a first surface anda second surface opposite to the first surface; forming a first metallayer on the first surface of the substrate, the first metal layer has afirst surface and a second surface opposite to the first surface, thefirst surface of the first metal layer having a plurality of protrusionstructures buried on the first surface of the substrate, wherein thesecond surface of the first metal layer has a first area definedthereon; forming an etch mask on the first area; etching the first metallayer so that the portions of the first metal layer protruding from thefirst surface of the substrate and exposed from the etch mask areremoved; removing the etch mask from the substrate; and forming a soldermask on the first surface of the substrate and exposing the first areaof the first metal layer.
 2. The method as claimed in claim 1, whereinthe step of forming a first metal layer on the first surface of thesubstrate comprises: providing a carrier; forming the first metal layeron the carrier, wherein the second surface of the first metal layer isattached to the carrier; pressing the carrier to the substrate so thatthe protrusion structures of the first metal layer are buried on thefirst surface of the substrate; and removing the carrier.
 3. The methodas claimed in claim 1, wherein the first metal layer is a copper layer.4. The method as claimed in claim 1, wherein the etch mask is a dryfilm.
 5. A method for manufacturing a circuit board, comprising thesteps of: providing a substrate with a first surface and a secondsurface opposite to the first surface; forming a first metal layer onthe first surface of the substrate, the first metal layer has a firstsurface and a second surface opposite to the first surface, the firstsurface of the first metal layer having a plurality of protrusionstructures buried on the first surface of the substrate, wherein thesecond surface of the first metal layer has a first area and a secondarea defined thereon; forming a plating mask on the second surface ofthe first metal layer and exposing the first and second areas; forming asecond metal layer on the first and second areas; removing the platingmask; etching the first metal layer so that the portions of the firstmetal layer protruding from the first surface of the substrate andexposed from the second metal layer are removed; and forming a soldermask on the first surface of the substrate and exposing the second metallayer.
 6. The method as claimed in claim 5, wherein the step of forminga first metal layer on the first surface of the substrate comprises:providing a carrier; forming the first metal layer on the carrier,wherein the second surface of the first metal layer is attached to thecarrier; pressing the carrier to the substrate so that the protrusionstructures of the first metal layer are buried on the first surface ofthe substrate; and removing the carrier.
 7. The method as claimed inclaim 5, wherein the second metal layer is a nickel/gold layer.
 8. Themethod as claimed in claim 5, wherein the second metal layer on thefirst area is adapted to be a pad for being electrically connected toexternal circuitry through a solder ball.
 9. The method as claimed inclaim 5, wherein the second metal layer on the second area is adapted tobe a finger for being electrically connected to external circuitrythrough a bonding wire.
 10. The method as claimed in claim 5, furthercomprising: forming a third metal layer on the second surface of thesubstrate, the third metal layer has a first surface and a secondsurface opposite to the first surface, the first surface of the thirdmetal layer having a plurality of protrusion structures buried on thesecond surface of the substrate, wherein the second surface of the thirdmetal layer has a first area defined thereon; forming the plating maskon the second surface of the third metal layer and exposing the firstarea of the third metal layer; forming a fourth metal layer on the firstarea of the third metal layer; removing the plating mask from the secondsurface of the third metal layer; etching the third metal layer so thatthe portions of the third metal layer protruding from the second surfaceof the substrate and exposed from the fourth metal layer are removed;and forming the solder mask on the second surface of the substrate andexposing the fourth metal layer.
 11. The method as claimed in claim 10,wherein the fourth metal layer on the first area of the third metallayer is adapted to be electrically connected to another circuit board.12. A circuit board, comprising: a substrate having a first surface anda second surface opposite to the first surface; a first conductive tracelayer buried on the substrate and exposed from the first surface of thesubstrate, wherein the first conductive trace layer has a first area anda second area, the first and second areas protrude from the firstsurface of the substrate; and a solder mask formed on the first surfaceof the substrate and exposing the first and second areas.
 13. Thecircuit board as claimed in claim 12, further comprising: a first metallayer formed on the first and second areas of the first conductive tracelayer.
 14. The circuit board as claimed in claim 13, wherein the firstmetal layer is a nickel/gold layer.
 15. The circuit board as claimed inclaim 12, further comprising: a second conductive trace layer buried onthe substrate and exposed from the second surface of the substrate,wherein the second conductive trace layer has a third area, the thirdarea protrudes from the second surface of the substrate, wherein thesolder mask is further formed on the second surface of the substrate andexposing the third area.
 16. The circuit board as claimed in claim 15,further comprising a second metal layer formed on the third area of thesecond conductive trace layer and adapted to be electrically connectedto another circuit board.
 17. The circuit board as claimed in claim 16,wherein the second metal layer is a nickel/gold layer.
 18. The circuitboard as claimed in claim 12, wherein the substrate further has athrough hole plated with a copper layer.